Job Title | Hardware Design Engineer – Trainee |
Job Location | Chennai |
Job Description | Designing & developing defence computing boards and systems for |
defence and aerospace companies for Govt. of India. | |
CTC Offered | 1.44 lpa |
UG Qualification | B.Tech / ECE / EEE / E & I – 2013 & 14 passed outs |
Profile Description | Skills in Basics of electronics, Basics of Analog & Digital Electronics, |
LIC, OPAMP, Cicruit Theory concepts, Microcontroller & | |
Microprocessor concepts. Good communication skills & good attitude. | |
Joining Date | Oct 16th 2014 |
Selection Process | 90 minutes written test in Basics of electronics + Aptitude. Paper and |
Pen Test, followed by 2 rounds of Technical Interview and 1 round of | |
HR interview. | |
Gender | Male only |
Agreement | 2 year |
Percentage : should be 65 % and above in 10th, 12th & UG.
Interview Date : 27th Sep 2014.
- Last date to register : 25th Sep 2014.